Bogisim project, build CPU circit

You will be developing a two cycle(Fetch-Decode, Execute-Writeback) 15-bit RISC-V like CPU forthis project. The CPU will contain 8, 15-bit general purpose registers R0 –R7(though R0 is hardwired to zero). A 15-bit program counter PC, 15-bit instruction buffer IB,15-bit save restore program counter,an 8-bit flags register, and an 8-bit save restore flags register. The flags register has twoempty bit, and sixflags: Interrupt I, Zero Z, Negative N, Overflow O, Carry C, Interrupt Enable E. All instructions are 15-bits and are described in the following section.